Texas Instruments MSPM0G110x: Integrated Analog Performance in an 80 MHz Cortex-M0+ Package

Adding discrete ADCs and operational amplifiers to microcontroller designs increases board space, component count, and bill-of-materials costs. Texas Instruments' MSPM0G110x family addresses these challenges by integrating the analog front-end directly into an 80 MHz Arm® Cortex®-M0+ microcontroller. The series delivers two simultaneous-sampling 12-bit ADCs running at 4 Msps, on-chip operational amplifiers, and configurable voltage references for demanding signal conditioning without external analog components.

Figure 1: The Texas Instruments MSPM0G1106TRHBR. (Image source: TI)

A peek into the dual ADC architecture

The MSPM0G110x stands out with its dual 12-bit successive approximation register ADCs, each capable of 4 Msps conversion rates. You get up to 17 external analog input channels, allowing you to monitor multiple sensor inputs or measurement points simultaneously. The simultaneous sampling capability matters when you need to capture phase-aligned signals, such as in three-phase motor current sensing or synchronized multi-channel data acquisition.

If your application prioritizes precision over speed, you can enable hardware averaging to achieve 14-bit effective resolution at 250 ksps without writing averaging algorithms in software. This on-chip oversampling reduces noise and improves measurement quality for applications like precision voltage monitoring or temperature sensing where you can trade conversion speed for better accuracy.

The integrated general-purpose amplifier uses chopper stabilization to minimize offset drift across temperature. You can configure this GPAMP as a unity-gain buffer, inverting or non-inverting amplifier, or programmable gain stage positioned directly before the ADC. Rail-to-rail input and output operation means you can condition signals spanning nearly the full supply range. For current sensing in motor drives or power monitoring applications, this avoids the need for discrete op-amps while keeping the analog signal path short and controlled.

Internal voltage references at 1.4 V or 2.5 V provide flexibility for different input signal ranges. When you need tighter reference accuracy than the internal sources provide, external reference inputs remain available. An integrated temperature sensor connects directly to the ADC channels for on-chip thermal monitoring. Keep in mind that when supply voltage drops below 2.7 V, only the 1.4 V reference continues operating.

Processing & memory options

An 80 MHz Arm Cortex-M0+ core delivers adequate headroom for signal processing algorithms alongside sensor management and communication tasks. You can choose from three memory configurations based on code complexity and data storage requirements. The MSPM0G1105 offers 32 KB Flash with 16 KB SRAM for compact applications. The MSPM0G1106 doubles both to 64 KB Flash and 32 KB SRAM, while the MSPM0G1107 provides 128 KB Flash with 32 KB SRAM for more complex firmware or systems requiring extensive data logging.

Flash memory includes hardware error correction code to detect and correct single-bit errors, enhancing reliability for industrial environments. Selected Flash sectors support up to 100,000 program and erase cycles for applications requiring frequent parameter updates or non-volatile data logging. SRAM includes optional hardware parity checking that detects single-bit errors in memory operations. These protection features address functional safety requirements without consuming processor cycles for software-based memory validation.

The memory protection unit allows you to partition application code from bootloaders or safety-critical routines, preventing unintended access between software modules. Two windowed watchdog timers provide system supervision, and hardware CRC-16 and CRC-32 acceleration verifies data integrity during communication or storage operations without overburdening the CPU.

Optimizing power consumption across operating modes

Power management operates across six primary modes, giving you control over current consumption based on system activity. At maximum performance, expect 101 microamperes per MHz when running CoreMark benchmarks from Flash at 80 MHz. This active power consumption remains competitive for an M0+ core delivering this level of analog integration.

Low-power operation is critical in battery-powered or energy-harvesting systems. STANDBY mode consumes 1.5 microamperes while maintaining a 32 kHz crystal oscillator, real-time clock operation, and full SRAM retention with register states preserved. When you need minimal leakage, SHUTDOWN mode draws just 80 nanoamperes while keeping GPIO states intact and enabling wake-up from external signals. STOP mode at 190 microamperes with 4 MHz operation suits applications requiring periodic background processing without full-speed operation.

The wide operating voltage range from 1.62V to 3.6 V accommodates direct connection to lithium coin cells, two or three alkaline cells, or standard 3.3 V supplies. Wake-up from STANDBY to 32 MHz active operation completes in less than 4.5 microseconds, making event-driven architectures practical where you need fast response times without continuous processor operation.

Peripherals for motor control and industrial applications

The peripheral set targets industrial automation, motor drives, and smart appliances. Two 16-bit advanced control timers include deadband insertion and fault input handling crucial for driving half-bridge and full-bridge power stages. The complete timer subsystem provides up to 22 PWM channels across seven timers, with support for quadrature encoder input when you need position feedback in closed-loop motor control.

Communication interfaces cover standard embedded requirements through four UART ports, two SPI interfaces, and two I²C controllers. One UART supports LIN, IrDA, DALI, Smart Card, and Manchester encoding for specialized industrial protocols. One SPI interface operates at 32 Mbps for high-throughput sensor data or display updates. Both I²C controllers support Fast Mode Plus at 1 Mbps, plus SMBus and PMBus protocol variants common in power management applications.

A seven-channel DMA controller manages high-throughput data transfers between peripherals and memory without processor intervention. You can configure DMA to move ADC samples to memory buffers, feed DAC outputs from lookup tables, or handle serial communication without triggering interrupts on every byte. This automation reduces interrupt overhead and allows the processor to focus on signal processing or control algorithms.

Package options and GPIO configuration

Package choices range from 64-pin LQFP measuring 12 × 12 mm down to 24-pin VQFN at 4 × 4 mm, with a 28-pin DSBGA option measuring just 2.87 × 1.45 mm when board space is severely constrained. GPIO counts scale with package size: you get 60 general-purpose I/O pins on 64-pin packages and 20 GPIO on the smallest 24-pin variants. Two pins offer 5 V tolerant open-drain capability for interfacing with higher-voltage buses, while two high-drive outputs can source 20 mA for driving LEDs or small loads directly.

The MSPM0G1105 ships in 48-pin LQFP and VQFN packages. The MSPM0G1106 adds 64-pin LQFP options plus 32-pin VQFN and 28-pin DSBGA alternatives. The MSPM0G1107 with maximum memory offers the full range: 48-pin and 64-pin LQFP, 24-pin, 32-pin, and 48-pin VQFN, 28-pin VSSOP, and 28-pin DSBGA. The operating temperature is from -40°C to +105°C across all variants, supporting industrial and outdoor installations.

Getting started with development tools

For evaluation and development, the LP-MSPM0G3507 LaunchPad development board provides immediate access to the 80 MHz architecture. Code you develop for the MSPMG3507 transfers directly to G110x targets since both share the same core and peripheral architecture. The LaunchPad includes an onboard XDS110 debug probe with EnergyTrace technology for real-time power profiling during development.

Figure 2: The LP-MSPM0G3507 LaunchPad development kit for 80 MHz Arm Cortex-M0+ MCUs. (Image source: TI)

The MSPM0 SDK version 2.08.00.03 includes DriverLib peripheral libraries, TI Drivers middleware, SysConfig graphical configuration tool, FreeRTOS support, and specialized middleware for motor control algorithms including field-oriented control implementations. Protocol stacks for SMBus, LIN, and DALI, plus EEPROM emulation libraries, accelerate common embedded tasks. Texas Instruments supports Code Composer Studio, IAR Embedded Workbench, and Keil (ARM) MDK development environments.

TI provides migration guides from STM32, STM8, PIC, and MSP430 families when you need to transition existing designs. The MSPM0-DIAGNOSTIC-LIB software library includes functional safety diagnostic routines targeting IEC 60730 Class-B requirements if your application requires certified safety measures.

Visit MSPM0G110x MCUs for more information.